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After examining the project requirements regarding functional safety and data security, the final step deals with the peripheral components.
One pin, multiple peripheral functions
Besides sufficient computing power, a sufficient number of pins is a crucial factor for the success of a project. All microcontrollers share one limitation: there are usually always more peripheral functions than available pins.
Some microcontrollers are offered in different package types despite using the same internal silicon. Packages with fewer pins are typically less expensive and also require less space on the assembly. However, fewer pins also mean that fewer peripheral functions are visible or accessible from the outside, or that they can have an external effect. Therefore, a key task is to investigate whether all the essential peripheral modules have the required number of port pins.
Figure 10: Multiple peripheral functions – only one available pin
Performance increase through core-private memory
Figure 11: Core-private and system-global memory
The multicore microcontroller architectures differ significantly from each other in their memory implementation:
- Lots of global storage and little core local storage.
- Little global storage and a lot of core local storage.
If very high computing performance is required, this can be achieved through many core-local memories and a high core clock speed. Furthermore, programs stored in local memories can be better protected against unauthorized access by other cores.
The on-chip bus system – a performance bottleneck?
Bus systems that only allow serial communication can quickly become a bottleneck in applications when large amounts of data need to be communicated. For example, when using Ethernet modules, these units typically lack sufficient private memory. Bus matrix systems, such as a crossbar switch, are a better solution. This implementation is now used as a bus interface for connecting cores to global resources. Usually, all peripheral modules are connected via one or two serial bus systems.
Figure 12: Bus matrix – Crossbar Switch XBAR
To prevent unpleasant surprises, a performance analysis of the bus systems used is worthwhile, so that unexpected communication delays do not occur in real-world applications.
Conclusion
For a successful migration from a single-core hard real-time application to a multi-core application, resource management during microcontroller selection is highly recommended.
Go to calendar view
Part 1: How project resources determine the right choice of multicore microcontrollers
Part 2: Which safety and security requirements are important when choosing an MCU?
Further information
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