Microcontrollers
TriCore®/AURIX™
AURIX™ TC4xx: 32-Bit Multicore Microcontroller Family (Aurix-3G Third Generation) - Live Online Training
You know the architecture, essential on-chip peripherals and features (especially of the multicore architecture and safety extensions as well as virtualization and protection mechanisms) of the AURIX™ device family.
You get to apply low-level drivers for this hardware, adapt examples as required and test them with a debugger.
Numerous examples and demos illustrate and facilitate the use of the devices.
YOUR BENEFIT:
Efficient and compact jump-start into the overall topic (3 months time saving according to customers).
Practical tips on multicore, safety, security, and virtualization
Hardware and software architects, hardware and software developers, test engineers, integrators // IMPORTANT NOTE: A valid NDA with the chip vendor is a pre-requirement to attend the Aurix-3G training course.
ANSI-C knowledge; experience in microcontroller/ microprocessor system programming and architecture. Knowledge of the previous device generation is of advantage but not mandatory.
Introduction
System Architecture
Internal Infrastructure
- SRI
- FPI
- LLI
Virtual Machines and Hypervisor
TriCore™ CPU
- Context switching
- New instructions
- Virtualization
- Trap system
- MPU
- System timer
Protection Mechanisms
- PROT
- APU
Memory
- NVM
- UCBs
- SOTA
- Cache
Ports
Interrupt Router (IR)
System Direct Memory Access Controller
Safety Concept
- CRC engine
- Watchdogs
- BIST
- Clocking
- Voltage monitors
- SMU
Security Concept
- CS real-time module
- CS satellite
Power Management System
- Domains
- Wakeup timer
- RTC
- Standby controller
System Control and Management
- Clocking
- NMI
- Reset
- Firmware
- Boot
Complex Peripherals Overview and Special Features
- PPU
- GTM
- CAN
- xSPI
- PCIe
- ETH
Data Routing Engine
Analog to Digital Conversion
- TMADC
- Fast compare
- DSADC
- CDSP
Multicore Debug
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IMPORTANT NOTE: A valid NDA with the chip vendor is a pre-requirement to attend the Aurix-3G training course.
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Please note that the Aurix-3G training does not explicitly cover ADAS specific blocks. If required, please contact our service office prior to the training, phone +49 (0)89 450617-71.
Präsenz-Training - Englisch
Live-Online - Deutsch
Präsenz-Training - Deutsch
AURIX™ TC4xx: 32-Bit Multicore Microcontroller Family (Aurix-3G Third Generation) - Live Online Training
Inhalt
Introduction
System Architecture
Internal Infrastructure
- SRI
- FPI
- LLI
Virtual Machines and Hypervisor
TriCore™ CPU
- Context switching
- New instructions
- Virtualization
- Trap system
- MPU
- System timer
Protection Mechanisms
- PROT
- APU
Memory
- NVM
- UCBs
- SOTA
- Cache
Ports
Interrupt Router (IR)
System Direct Memory Access Controller
Safety Concept
- CRC engine
- Watchdogs
- BIST
- Clocking
- Voltage monitors
- SMU
Security Concept
- CS real-time module
- CS satellite
Power Management System
- Domains
- Wakeup timer
- RTC
- Standby controller
System Control and Management
- Clocking
- NMI
- Reset
- Firmware
- Boot
Complex Peripherals Overview and Special Features
- PPU
- GTM
- CAN
- xSPI
- PCIe
- ETH
Data Routing Engine
Analog to Digital Conversion
- TMADC
- Fast compare
- DSADC
- CDSP