Experience Embedded

Professional Training, Consulting and Project Support

AURIX™ TC2xx Workshop: 32-Bit Multicore Microcontroller Family - Face-to-Face Training

  • Content
     
  • Objectives
     
  • Participants
     
  • Requirements
     

You know the architecture, basic on-chip peripherals and features (especially of the multicore architecture and safety extensions) of the AURIX™ device family.

You are able to program low-level drivers for this hardware, adapt them and test them with a debugger.

You can moreover generate interrupt and trap routines.

YOUR BENEFIT:

Efficient and compact jump-start into the overall topic

Practical tips on multicore and safety

Tips on how to create an efficient software architecture

Exercises on USB stick or as download.

Hardware and software architects, hardware and software developers, test engineers // IMPORTANT NOTE: A valid NDA with the chip vendor is a pre-requirement to attend the course.

ANSI-C knowledge; experience in microcontroller/microprocessor system programming and architecture

Infineon AURIX™Architecture: Overview

AURIX™ Multicore

  • CPU, pipelines, register sets, floating point unit FPU, DSP extension
  • Memory model, local and global memory units
  • On-chip bus systems: 64-bit XBAR, 32-bit system peripheral bus SPB
  • TRAP handling

Ports (Pin Definition and Port Functions)

Protection System

Multicore Interrupt Processing: Interrupt Router

Direct Memory Access Controller DMA

On-Chip AURIX™ Peripherals

Timer

  • System timer module STM
  • Generic timer module GTM
  • Capture and compare unit CCU6

Communication Interfaces

  • UART/LIN, QSPI, I2C, MSC, HSSL & HSCT
  • Overview: MultiCAN, Ethernet, FlexRay®

Sensor Interfaces

  • Single edge nibble transmission SENT
  • Peripheral sensor interface PSI5

Analog-to-Digital Converter

  • Versatile analog-digital converter VADC
  • Delta-sigma analog-digital converter DSADC

System Control Unit SCU

  • Clock control
  • Reset system
  • Power management
  • External request unit ERU
  • Start-up process
  • Watchdog timer WDT

Safety

On-chip Debug System OCDS

Overview: Emulation Device & Calibration

Exercises

  • Exercises are performed with an Infneon AURIX™ board, covering the following aspects: interrupt controller, DMA controller, multicore start-up, initialization of peripherals.
  • -------------------------------------------------------------------------

IMPORTANT NOTE: A valid NDA with the chip vendor is a pre-requirement to attend the course.

-------------------------------------------------------------------------

ADAS specific blocks are not covered

The training price includes:
Lunch, drinks, training documentation and your training certificate.


ALL INCLUSIVE!

Related trainings

AURIX™ TC3xx Workshop: 32-Bit Multicore Microcontroller Family (2G Second Generation) - Face-to-Face Training
Training code: E-AURIX2G

Generic Timer Module v1 and v3 (Bosch-GTM): Architecture and Programming - Face-to-Face Training
Training code: E-GTM

TriCore™ AUDO MAX Family: Architecture and Peripherals - Face-to-Face Training
Training code: E-TRI-AM

TriCore™ AUDO FUTURE Family: Architecture and Peripherals - Face-to-Face Training
Training code: E-TRI-AF

TC17x7: Practical Application of TriCore™ Specific Peripherals - Face-to-Face Training
Training code: E-TC17XXP

Debugging for TriCore/AURIX™ with the PLS Universal Debug Engine UDE - Face-to-Face Training
Training code: E-UDEPLS

Tracing and Multicore Debugging for TriCore/AURIX™ (MCDS) with the PLS Universal Debug Engine UDE - Face-to-Face Training
Training code: E-MCDSPLS

Embedded C Training: Programming Methods and Tools for Embedded Applications - Face-to-Face Training
Training code: E-EMB-C

Embedded C++: Object-Oriented Programming for Microcontrollers with C++/EC++ and UML - Face-to-Face Training
Training code: E-EC++

Software Architectures for Embedded Systems and Real-Time Systems - Face-to-Face Training
Training code: E-EMB-AR

RTOS Basics and Application: RTOS Mechanisms and their Application in Runtime Architectures for Embedded and Real-Time Systems - Face-to-Face Training
Training code: E-RTOS-AR

Embedded Multicore Microcontrollers: Practical Application - Face-to-Face Training
Training code: E-µCMULTI

Coaching: TriCore®/AURIX™
Training code: CE-TRI-AUR


Related trainings

FACE-TO-FACE TRAINING

Price *Duration
2.950,00 €5 days
Training code: E-AURIX
* Price per attendee, in Euro plus VAT
> Registration form download (PDF)> Training details as PDF

Onsite Training

Our customized workshops integrate your specific project tasks in our training content and accommodate your requirements on content, time, location, duration, technical environment and knowledge transfer methodology.

Please contact us for further information or an individual quotation.

> Training details as PDF

Live Online - English

Duration
5 days  

Face-To-Face - German

Date Duration
05.07. – 09.07.2021 5 days  
25.10. – 29.10.2021 5 days  
13.12. – 17.12.2021 5 days  
21.02. – 25.02.2022 5 days  

Live Online - German

Date Duration
05.07. – 09.07.2021 5 days  
25.10. – 29.10.2021 5 days  
13.12. – 17.12.2021 5 days  

Coaching

Our coaching services offer a major advantage: our specialists introduce their expertise and experience directly in your solution process, thus contributing to the success of your projects.

Coaching: TriCore®/AURIX™

AURIX™ TC2xx Workshop: 32-Bit Multicore Microcontroller Family - Face-to-Face Training

Content

Infineon AURIX™Architecture: Overview

AURIX™ Multicore

  • CPU, pipelines, register sets, floating point unit FPU, DSP extension
  • Memory model, local and global memory units
  • On-chip bus systems: 64-bit XBAR, 32-bit system peripheral bus SPB
  • TRAP handling

Ports (Pin Definition and Port Functions)

Protection System

Multicore Interrupt Processing: Interrupt Router

Direct Memory Access Controller DMA

On-Chip AURIX™ Peripherals

Timer

  • System timer module STM
  • Generic timer module GTM
  • Capture and compare unit CCU6

Communication Interfaces

  • UART/LIN, QSPI, I2C, MSC, HSSL & HSCT
  • Overview: MultiCAN, Ethernet, FlexRay®

Sensor Interfaces

  • Single edge nibble transmission SENT
  • Peripheral sensor interface PSI5

Analog-to-Digital Converter

  • Versatile analog-digital converter VADC
  • Delta-sigma analog-digital converter DSADC

System Control Unit SCU

  • Clock control
  • Reset system
  • Power management
  • External request unit ERU
  • Start-up process
  • Watchdog timer WDT

Safety

On-chip Debug System OCDS

Overview: Emulation Device & Calibration

Exercises

  • Exercises are performed with an Infneon AURIX™ board, covering the following aspects: interrupt controller, DMA controller, multicore start-up, initialization of peripherals.
  • -------------------------------------------------------------------------

IMPORTANT NOTE: A valid NDA with the chip vendor is a pre-requirement to attend the course.

-------------------------------------------------------------------------

ADAS specific blocks are not covered