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PXROS-HR Certified RTOS

  • Content
     
  • Objectives
     
  • Participants
     
  • Requirements
     

After the PXROS-HR training, you are familiar with the mechanisms and concepts of this real-time operating system for the Infineon TriCore™ architecture.

You understand the RTOS application and the relation with the TriCore™ memory protection unit (MPU) mechanism.

Software developers and system engineers who want to develop operating system applications for safe and secure systems.

You know the Infineon TriCore™ architecture and its memory protection unit (MPU). Knowledge of operating system mechanisms is an advantage.

Multicore Real-Time Microkernel

Message-based Communication

Interrupt Lock-Free Kernel

Static / Dynamic Resource Management

Tasks in PXROS-HR

  • Task configuration/ initialization and activation
  • InitTask stacks
  • Task local variables
  • Task priority and privilege level
  • Task interface
  • Task execution loop
  • Tasks in PXROS-HR context
  • Anatomy of a task
  • Task priorities
  • Task context change
  • MPU-protected data and code areas

Inter-Task Communication

  • Events
  • Messages, message types, mailboxes, basic message flow
  • Shared memory

Peripheral Handling

  • Extended memory regions
  • Access to HW peripherals
  • Event-driven peripheral service
  • Peripheral driver

Time in PXROS-HR

  • Timer setup
  • Timer tick
  • Task periodic timer
  • Time-out event
  • Periodic events

PXROS-HR Multicore Concept

AURIX-2G Setup and Linker/Locator

  • Startup code
  • Interrupt and TRAP tables
  • CSA regions
  • PXROS-HR kernel and task placement
  • Memory assignment in AURIX-2G
  • Configuration table


CONTACT

Melanie Menzl
Phone +49 (0)89 450617-71


SEMINAR LOCATION


ORGANIZATIONAL DETAILS

The training price includes:
Lunch, drinks, training documentation and your training certificate.


ALL INCLUSIVE!


BONUS SCHEDULE

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Training code: E-RTOS-AR

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Training code: E-RTOS-RT

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Training code: E-µCMULTI

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Training code: E-EMB-C

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Training code: E-EC++

Software Architectures for Embedded Systems and Real-Time Systems - Face-to-Face Training
Training code: E-EMB-AR

Coaching: Embedded and Real-Time Operating Systems, RTOS
Training code: CE-EMB-RTOS


Related trainings

FACE-TO-FACE TRAINING

DatePrice *Duration
13.06. – 14.06.20241.400,00 €2 days 
07.11. – 08.11.20241.400,00 €2 days 
Training code: E-PXROS
* Price per attendee, in Euro plus VAT
> Registration form download (PDF)> Training details as PDF

Onsite Training

Our customized workshops integrate your specific project tasks in our training content and accommodate your requirements on content, time, location, duration, technical environment and knowledge transfer methodology.

Please contact us for further information or an individual quotation.

> Training details as PDF

Face-To-Face - German

Date Duration
13.06. – 14.06.2024 2 days  
07.11. – 08.11.2024 2 days  
06.02. – 07.02.2025 2 days  

Coaching

Our coaching services offer a major advantage: our specialists introduce their expertise and experience directly in your solution process, thus contributing to the success of your projects.

Coaching: Embedded and Real-Time Operating Systems, RTOS

PXROS-HR Certified RTOS

Content

Multicore Real-Time Microkernel

Message-based Communication

Interrupt Lock-Free Kernel

Static / Dynamic Resource Management

Tasks in PXROS-HR

  • Task configuration/ initialization and activation
  • InitTask stacks
  • Task local variables
  • Task priority and privilege level
  • Task interface
  • Task execution loop
  • Tasks in PXROS-HR context
  • Anatomy of a task
  • Task priorities
  • Task context change
  • MPU-protected data and code areas

Inter-Task Communication

  • Events
  • Messages, message types, mailboxes, basic message flow
  • Shared memory

Peripheral Handling

  • Extended memory regions
  • Access to HW peripherals
  • Event-driven peripheral service
  • Peripheral driver

Time in PXROS-HR

  • Timer setup
  • Timer tick
  • Task periodic timer
  • Time-out event
  • Periodic events

PXROS-HR Multicore Concept

AURIX-2G Setup and Linker/Locator

  • Startup code
  • Interrupt and TRAP tables
  • CSA regions
  • PXROS-HR kernel and task placement
  • Memory assignment in AURIX-2G
  • Configuration table