TriCore™ AUDO FUTURE Family: Architecture and Peripherals
You know the architecture, basic on-chip periphery and specifics of the TriCore™ device family. You are able to program low-level drivers (initialization routines for peripherals) for this microcontroller and test them with a debugger. Moreover, you can generate interrupt and trap routines.
Software and hardware architects, software and hardware developers, test engineers
Knowledge of ANSI-C as well as experience with programming and the set-up of a microprocessor/microcontroller system. Knowledge of DSP is an advantage.
Infineon TriCore™ Architecture: Overview
TriCore™ Core Version V1.3.1
- CPU, pipelines, register sets
- Memory model, local memory units
- DSP support
- On-chip bus systems
TriCore™ Ports (Pin Definition and Port Functions)
Peripheral Control Processor PCP2
Direct Memory Access Controller DMA
TriCore™ Peripherals, AUDO FUTURE Family (TC1797/67/36)
- Asynchronous serial interface ASCx
- Synchronous serial interface SSCx
- Micro second channel MSCx
- Micro link interface MLI
- System timer STM
- General purpose timer arrays GPTA
Analog-to-Digital Converter ADCx
Fast Analog-to-Digital Converter FADC
External Bus Unit EBU (TC1797)
System Control Unit SCU, Reset, Power Management
- Start-up process
- Resets (power-on, HW, SW, WDT, deep sleep reset)
- Clock control, PLL
- Power management
- Watchdog timer WDT
Device Initialization with DAvE
Debug Support (OCDS) and Environment Tools: Overview
- Initialization of periphery, interrupt handling, DMA application and PCP programming
- To get trained in hardware-near C and embedded programming, please see our training "Embedded C: Efficient Use of Programming Methods and Tools for Embedded Applications".
OPEN FACE-TO-FACE FORMAT
|2.500,00 €||5 days|
|Training code: E-TRI-AF|
* Price per attendee, in Euro plus VAT
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