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AURIX™ TC4xx: 32-Bit Multicore Microcontroller Family (Aurix-3G Third Generation) - Live Online Training

  • Content
     
  • Objectives
     
  • Participants
     
  • Requirements
     

You know the architecture, basic on-chip peripherals and the features (especially related to multicore and safety extensions) of the AURIX™ device family.

You get to apply low-level drivers for this hardware, adapt examples as required and test them with a debugger.

Numerous exercises make this training a practice-oriented software workshop.

YOUR BENEFIT:

Efficient and compact jump-start into the overall topic

Practical tips on multicore and safety

Exercises for download

Hardware and software architects, hardware and software developers, test engineers // IMPORTANT NOTE: A valid NDA with the chip vendor is a pre-requirement to attend the Aurix-3G training course.

ANSI-C knowledge; experience in microcontroller/microprocessor system programming and architecture

AURIX-3G System Architecture

A3G Introduction

CPU Subsystem AURIX-3G

Virtual Machine Control - VM

On-Chip Bus Systems and Bridges

  • Shared resource interconnect (SRI), flexible peripheral interconnect (FPI / SPB), low latency interconnect (LLI), bus bridges

Memory

Functional Safety and Security Systems

Functional Safety and Security Features

Cyber Security Real-Time Module

Cyber Security Satellite (CSS)

Interrupts and Traps, Direct Memory Access Controller (DMA)

System Control and Management

  • System control unit, clock management, system mode management unit (SMM)
  • AURIX-3G power management system (PMS)

Peripherals - Ports and Timer Modules

  • General purpose I/O ports and peripheral I/O lines
  • Timer modules: Generic timer module (GTM), enhanced timer module (eGTM)

Serial Interfaces

Automotive Interfaces

Asynchronous Interface - ASC / Local Interconnect Network (LIN)

CAN Interfaces

  • Controller area network interface (MCMCAN),
  • Controller area network interface extra long (CANXL)
  • FlexRay™ controller (ERAY)
  • Standard serial interfaces: Inter-integrated circuit (IIC/I2C), queued serial peripheral interface (QSPI)
  • eXpanded serial peripheral interface (xSPI)

Ethernet Modules

  • Ethernet (GETH), Lite Ethernet (LETH)

PCIe Module

Analog to Digital Converter

  • Versatile ADC, delta-sigma ADC (DSADC)

Parallel Processing Unit (PPU)

On-Chip Debug Support and Emulation Device

Exercises

  • Numerous exercises will be conducted on an Infineon AURIX™ board, covering the following aspects: use of low-level drivers, protection mechanisms, interrupt controller, DMA controller, system timer, port, multicore aspects, monitoring, performance measurement etc.

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IMPORTANT NOTE: A valid NDA with the chip vendor is a pre-requirement to attend the Aurix-3G training course.

-------------------------------------------------------------------

Please note that the Aurix-3G training does not explicitly cover ADAS specific blocks. If required, please contact our service office prior to the training, phone +49 (0)89 450617-71.

The training price includes:
Training documentation, your training certificate and target HW etc. where required.


ALL INCLUSIVE!

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Coaching: TriCore®/AURIX™
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Related trainings

Live-Online-Training

Date Price *Duration
03.06. – 07.06.20243.500,00 €5 Days 
23.09. – 27.09.20243.500,00 €5 Days 
03.03. – 07.03.20253.500,00 €5 Days 
Training code: LE-AURIX3G
* Price per attendee, in Euro plus VAT

> Registration form download (PDF)
> Training details as PDF

Face-To-Face - English

Date Duration
08.07. – 12.07.2024 5 days  
16.12. – 20.12.2024 5 days  

Live Online - German

Date Duration
03.06. – 07.06.2024 5 days  
23.09. – 27.09.2024 5 days  
03.03. – 07.03.2025 5 days  

Face-To-Face - German

Date Duration
08.07. – 12.07.2024 5 days  
16.12. – 20.12.2024 5 days  

AURIX™ TC4xx: 32-Bit Multicore Microcontroller Family (Aurix-3G Third Generation) - Live Online Training

Content

AURIX-3G System Architecture

A3G Introduction

CPU Subsystem AURIX-3G

Virtual Machine Control - VM

On-Chip Bus Systems and Bridges

  • Shared resource interconnect (SRI), flexible peripheral interconnect (FPI / SPB), low latency interconnect (LLI), bus bridges

Memory

Functional Safety and Security Systems

Functional Safety and Security Features

Cyber Security Real-Time Module

Cyber Security Satellite (CSS)

Interrupts and Traps, Direct Memory Access Controller (DMA)

System Control and Management

  • System control unit, clock management, system mode management unit (SMM)
  • AURIX-3G power management system (PMS)

Peripherals - Ports and Timer Modules

  • General purpose I/O ports and peripheral I/O lines
  • Timer modules: Generic timer module (GTM), enhanced timer module (eGTM)

Serial Interfaces

Automotive Interfaces

Asynchronous Interface - ASC / Local Interconnect Network (LIN)

CAN Interfaces

  • Controller area network interface (MCMCAN),
  • Controller area network interface extra long (CANXL)
  • FlexRay™ controller (ERAY)
  • Standard serial interfaces: Inter-integrated circuit (IIC/I2C), queued serial peripheral interface (QSPI)
  • eXpanded serial peripheral interface (xSPI)

Ethernet Modules

  • Ethernet (GETH), Lite Ethernet (LETH)

PCIe Module

Analog to Digital Converter

  • Versatile ADC, delta-sigma ADC (DSADC)

Parallel Processing Unit (PPU)

On-Chip Debug Support and Emulation Device

Exercises

  • Numerous exercises will be conducted on an Infineon AURIX™ board, covering the following aspects: use of low-level drivers, protection mechanisms, interrupt controller, DMA controller, system timer, port, multicore aspects, monitoring, performance measurement etc.

--------------------------------------------------------------------

IMPORTANT NOTE: A valid NDA with the chip vendor is a pre-requirement to attend the Aurix-3G training course.

-------------------------------------------------------------------

Please note that the Aurix-3G training does not explicitly cover ADAS specific blocks. If required, please contact our service office prior to the training, phone +49 (0)89 450617-71.