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XC2000/XE16x/XC16x/ST10: Architecture, Peripherals and Embedded Programming - Face-to-Face Training

  • Content
     
  • Objectives
     
  • Participants
     
  • Requirements
     

You know the architecture, basic on-chip periphery and specifics of the XC2000 / XE16x / XC16x and ST10 device families. You are able to program low-level drivers for this hardware with Keil C166 µVision or the Tasking Viper toolset and test them with a debugger. Moreover, you can generate interrupt routines for the CPU and know the functionality of exceptions/traps.

Hardware and software architects, hardware and software developers, test engineers

Knowledge of ANSI-C as well as experience with programming and the set-up of a microprocessor/microcontroller system. Knowledge of DSP is an advantage.

Infineon XC2000/XE16x/XC16x Architecture: Overview

XC2000/XE16x/XC16x and ST10: C166s V2 Core

  • CPU, pipelines, register set, context switch, CPU special function register
  • Instruction fetch unit and program flow control
  • Memory architecture and address map
  • Internal memory block (on-chip: program and data SRAMs, embedded flash)
  • System and user stack
  • Overview: Instruction set, special instructions and DSP support

Differences in Architecture: XE16x/XC22xx and XC16x

Ports (Pin Definition and Port Functions)

Hardware-near C with Keil/Tasking Tools

  • C statements and their execution in Assembler
  • Architecture-specific data types, global data handling

Programming Techniques

  • Description of peripherals
  • Layer model for embedded software systems

Driver Programming

  • Structured driver model
  • Low-level driver LLD

Interrupt, PEC and TRAP Handling

  • Interrupt controller, vector table, prioritization
  • Peripheral event controller PEC
  • TRAPs (exception handling)

Serial Interfaces

  • XC16x: asynchronous serial interface ASCx, synchronous serial interface SSCx
  • XC2000/XE16x: universal serial interface channel modules USICx with the features ASC, SCI, LIN, SSC, SPI, IIC, etc.

General Purpose Timer Unit, Watchdog Timer WDT, Real Time Clock RTC

Overview: MultiCAN, Analog Digital Converter ADCx

Overview: Capture Compare Units (CC2, CCU6x)

System Control Unit, Reset, Clock, Power Management

  • Start-up process
  • Resets, power management
  • Clock control, PLL
  • External request unit ERU

Device Initialization with Digital Application virtual Engineer DAvE®

On-Chip Debug System (OCDS/JTAG) and Environment Tools: Overview

Exercises: For practical training, participants can chooseKeil C166/ µVision 4 or the Tasking Viper toolset.

The following exercises will be carried out in addition to the training content:

  • Set-up of a new project: from device selection to debugger set-up
  • Interrupt handling: interrupt vector table entry and interrupt service routine
  • DMA transfer (using the PEC controller) in the context of serial communication
  • Typed memory reservation - hardware-near C programming
  • Use of power saving mechanisms like CPU IDLE mode
  • Use of complex and time-critical peripherals: ADC with PEC/interrupt handling

The training price includes:
Lunch, drinks, training documentation and your training certificate.


ALL INCLUSIVE!

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Related trainings

FACE-TO-FACE TRAINING

Price *Duration
-5 days
Training code: E-XC2X-XE
* Price per attendee, in Euro plus VAT
> Registration form download (PDF)> Training details as PDF

Onsite Training

Our customized workshops integrate your specific project tasks in our training content and accommodate your requirements on content, time, location, duration, technical environment and knowledge transfer methodology.

Please contact us for further information or an individual quotation.

> Training details as PDF

Face-To-Face - German

Duration
5 days  

Coaching

Our coaching services offer a major advantage: our specialists introduce their expertise and experience directly in your solution process, thus contributing to the success of your projects.

We will be happy to provide you with further information or submit a quotation tailored to your requirements.

XC2000/XE16x/XC16x/ST10: Architecture, Peripherals and Embedded Programming - Face-to-Face Training

Content

Infineon XC2000/XE16x/XC16x Architecture: Overview

XC2000/XE16x/XC16x and ST10: C166s V2 Core

  • CPU, pipelines, register set, context switch, CPU special function register
  • Instruction fetch unit and program flow control
  • Memory architecture and address map
  • Internal memory block (on-chip: program and data SRAMs, embedded flash)
  • System and user stack
  • Overview: Instruction set, special instructions and DSP support

Differences in Architecture: XE16x/XC22xx and XC16x

Ports (Pin Definition and Port Functions)

Hardware-near C with Keil/Tasking Tools

  • C statements and their execution in Assembler
  • Architecture-specific data types, global data handling

Programming Techniques

  • Description of peripherals
  • Layer model for embedded software systems

Driver Programming

  • Structured driver model
  • Low-level driver LLD

Interrupt, PEC and TRAP Handling

  • Interrupt controller, vector table, prioritization
  • Peripheral event controller PEC
  • TRAPs (exception handling)

Serial Interfaces

  • XC16x: asynchronous serial interface ASCx, synchronous serial interface SSCx
  • XC2000/XE16x: universal serial interface channel modules USICx with the features ASC, SCI, LIN, SSC, SPI, IIC, etc.

General Purpose Timer Unit, Watchdog Timer WDT, Real Time Clock RTC

Overview: MultiCAN, Analog Digital Converter ADCx

Overview: Capture Compare Units (CC2, CCU6x)

System Control Unit, Reset, Clock, Power Management

  • Start-up process
  • Resets, power management
  • Clock control, PLL
  • External request unit ERU

Device Initialization with Digital Application virtual Engineer DAvE®

On-Chip Debug System (OCDS/JTAG) and Environment Tools: Overview

Exercises: For practical training, participants can chooseKeil C166/ µVision 4 or the Tasking Viper toolset.

The following exercises will be carried out in addition to the training content:

  • Set-up of a new project: from device selection to debugger set-up
  • Interrupt handling: interrupt vector table entry and interrupt service routine
  • DMA transfer (using the PEC controller) in the context of serial communication
  • Typed memory reservation - hardware-near C programming
  • Use of power saving mechanisms like CPU IDLE mode
  • Use of complex and time-critical peripherals: ADC with PEC/interrupt handling