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Arm7/ Arm9/ Arm10/ Arm11™: Architecture and Embedded Programming - Face-to-Face Training

  • Content
     
  • Objectives
     
  • Participants
     
  • Requirements
     

You know the Arm architecture and can write software in C and Assembler. You can locate programs in memory and test them. This is the perfect start for designing Arm based systems.

Software and hardware developers

A basic understanding of ANSI-C and microcontrollers.

Arm Processor Architecture

  • Operating modes, states, pipeline, register organization
  • User mode, fast interrupt (FIQ) mode, interrupt (IRQ) mode
  • Supervisor mode, system mode, undefined mode
  • Thumb-2 state, Arm state, Thumb state, Jazelle state
  • Arm register file
  • Status register

Arm Processor Cores: Overview

  • Arm7 / Arm9 / Arm10 / Arm11 processor core
  • Cortex®-M, Cortex®-R, Cortex®-A processor cores

Arm, Thumb and DSP Instruction Sets

  • v4, v4T, v5, v6 instructions
  • v7 - Thumb-2 instruction set overview
  • Arm/Thumb interworking
  • Assembler directives

Exception Handling

  • FIQ, IRQ, ABORT, UNDEF, SVC
  • Vector table
  • Exception handler templates
  • Vectored interrupt controller (VIC)

System Control Coprocessor, CP15

  • Arm coprocessor concept
  • Overall system control & configuration
  • Cache configuration and cache management
  • Memory management unit (MMU) configuration
  • System performance monitoring

VFP2 Floating Point Unit

  • VFP2 architecture
  • VFP2 instruction set overview

Level 1 Memory Interface

  • Tightly coupled memory
  • Cache architecture
  • DMA interface

Level 2 Memory System

  • Advanced microprocessor bus architecture (AXI)
  • AXI bus masters
  • AXI bus slaves
  • Second level caches
  • On-chip RAM, peripherals
  • External memory

Memory Management Unit (MMU)

  • Translation lookaside buffer (TLB)
  • Page tables, attributes

Memory Protection Unit (MPU) for Embedded Systems

Clock, Reset and Power Control

Arm Debug Support

  • Embedded trace macrocell (ETM)
  • Performance monitoring unit (PMU)
  • CoreSight debug components
  • Debug coprocessor, CP14

Embedded Software Development

  • Adjustment of library routines to HW (retargeting)
  • Locating code and data in memory (scatter loading)
  • Linker description file
  • Reset, start-up, start-up file

Efficient C Programming for the Arm Architecture

  • Compiler optimization, compiler options
  • Interface C - assembler
  • Programming guidelines for Arm compilers
  • Efficient use of local and global variables

Hardware-near C

  • C statements and their execution in Assembler
  • Access to peripherals in C
  • Software architecture for embedded systems
  • Structured (object oriented) description of peripherals

Practical Exercises with Arm RealView Tools

  • Different tools can be used on request
  • All programs are tested on an evaluation board

The training price includes:
Lunch, drinks, training documentation and your training certificate.


ALL INCLUSIVE!

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Related trainings

FACE-TO-FACE TRAINING

Price *Duration
2.400,00 €4 days
Training code: E-ARM-7/9
* Price per attendee, in Euro plus VAT
> Registration form download (PDF)> Training details as PDF

Face-To-Face - German

Date Duration
07.06. – 10.06.2021 4 days  

Onsite Training

Our customized workshops integrate your specific project tasks in our training content and accommodate your requirements on content, time, location, duration, technical environment and knowledge transfer methodology.

Please contact us for further information or an individual quotation.

> Training details as PDF

Coaching

Our coaching services offer a major advantage: our specialists introduce their expertise and experience directly in your solution process, thus contributing to the success of your projects.

Coaching: Arm®/CORTEX®

Arm7/ Arm9/ Arm10/ Arm11™: Architecture and Embedded Programming - Face-to-Face Training

Content

Arm Processor Architecture

  • Operating modes, states, pipeline, register organization
  • User mode, fast interrupt (FIQ) mode, interrupt (IRQ) mode
  • Supervisor mode, system mode, undefined mode
  • Thumb-2 state, Arm state, Thumb state, Jazelle state
  • Arm register file
  • Status register

Arm Processor Cores: Overview

  • Arm7 / Arm9 / Arm10 / Arm11 processor core
  • Cortex®-M, Cortex®-R, Cortex®-A processor cores

Arm, Thumb and DSP Instruction Sets

  • v4, v4T, v5, v6 instructions
  • v7 - Thumb-2 instruction set overview
  • Arm/Thumb interworking
  • Assembler directives

Exception Handling

  • FIQ, IRQ, ABORT, UNDEF, SVC
  • Vector table
  • Exception handler templates
  • Vectored interrupt controller (VIC)

System Control Coprocessor, CP15

  • Arm coprocessor concept
  • Overall system control & configuration
  • Cache configuration and cache management
  • Memory management unit (MMU) configuration
  • System performance monitoring

VFP2 Floating Point Unit

  • VFP2 architecture
  • VFP2 instruction set overview

Level 1 Memory Interface

  • Tightly coupled memory
  • Cache architecture
  • DMA interface

Level 2 Memory System

  • Advanced microprocessor bus architecture (AXI)
  • AXI bus masters
  • AXI bus slaves
  • Second level caches
  • On-chip RAM, peripherals
  • External memory

Memory Management Unit (MMU)

  • Translation lookaside buffer (TLB)
  • Page tables, attributes

Memory Protection Unit (MPU) for Embedded Systems

Clock, Reset and Power Control

Arm Debug Support

  • Embedded trace macrocell (ETM)
  • Performance monitoring unit (PMU)
  • CoreSight debug components
  • Debug coprocessor, CP14

Embedded Software Development

  • Adjustment of library routines to HW (retargeting)
  • Locating code and data in memory (scatter loading)
  • Linker description file
  • Reset, start-up, start-up file

Efficient C Programming for the Arm Architecture

  • Compiler optimization, compiler options
  • Interface C - assembler
  • Programming guidelines for Arm compilers
  • Efficient use of local and global variables

Hardware-near C

  • C statements and their execution in Assembler
  • Access to peripherals in C
  • Software architecture for embedded systems
  • Structured (object oriented) description of peripherals

Practical Exercises with Arm RealView Tools

  • Different tools can be used on request
  • All programs are tested on an evaluation board