{"id":3070,"date":"2026-01-30T00:00:00","date_gmt":"2026-01-29T23:00:00","guid":{"rendered":"https:\/\/kunden.weissblaumedia.de\/microconsult\/2017\/03\/28\/ip-multicore-mikrocontroller-3\/"},"modified":"2026-06-17T13:18:01","modified_gmt":"2026-06-17T11:18:01","slug":"ip-multicore-microcontroller-3","status":"publish","type":"post","link":"https:\/\/www.microconsult.de\/en\/ip-multicore-mikrocontroller-3\/","title":{"rendered":"Multicore microcontrollers Part 3: Are the available resources in the periphery sufficient?"},"content":{"rendered":"

After examining the project requirements regarding functional safety and data security, the final step deals with the peripheral components.<\/strong><\/p>\n

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One pin, multiple peripheral functions<\/h4>\n

Besides sufficient computing power, a sufficient number of pins is a crucial factor for the success of a project. All microcontrollers share one limitation: there are usually always more peripheral functions than available pins.<\/p>\n

Some microcontrollers are offered in different package types despite using the same internal silicon. Packages with fewer pins are typically less expensive and also require less space on the assembly. However, fewer pins also mean that fewer peripheral functions are visible or accessible from the outside, or that they can have an external effect. Therefore, a key task is to investigate whether all the essential peripheral modules have the required number of port pins.<\/p>\n

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Figure 10: Multiple peripheral functions \u2013 only one available pin<\/em><\/p>\n

Performance increase through core-private memory<\/h4>\n

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Figure 11: Core-private and system-global memory<\/em><\/p>\n

The multicore microcontroller architectures differ significantly from each other in their memory implementation:<\/p>\n