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Cortex™-R4: ARM Cortex-R Architecture Training

  • Content
     
  • Objectives
  • Participants
  • Requirements

You know the Cortex™-R4 architecture and can write software in C and Assembler. You can place the programs in memory and test them. You get the perfect introduction in developing Cortex-based systems.

Software and hardware developers(If you already attended our Training "ARM7/9/10/11: Architecture and Embedded Programming", please contact us prior to booking).

A basic understanding of ANSI-C and microcontrollers.

ARM Cortex Processor Architecture

  • Register organisation, operation modes, states, pipeline

ARM Processor Cores

  • Cortex™-R4 processor core
  • ARM7TDMI / ARM9TDMI / ARM9E-S / ARM10 / ARM11 processor core

ARM, Thumb, Thumb-2 Instruction Sets

  • ARM v4, v4T, v5, v6 instruction set
  • Thumb instruction set
  • Thumb-2 instruction set
  • ARM/Thumb interworking
  • Assembler directives

Exception Handling

  • FIQ, IRQ, abort, supervisor call, undefined
  • Exception handler examples
  • Vectored interrupt controller

Coprocessors, Floating Point Unit

  • ARM coprocessor concept
  • System controller CP15
  • Floating point unit, FPU
  • System configuration

L1 Memory Interface

  • Tightly coupled memory, cache architecture
  • Memory protection unit, MPU

L2 Memory Interface

  • AXI, advanced microprocessor bus architecture
  • Master interface
  • Slave interface

Debug, Trace, Performance Monitoring

  • Watchpoint units, embedded trace macrocell ETM
  • Performance monitor unit, PMU

Embedded Software Development

  • Adjustment of library routines to hardware (retargeting)
  • Placing code and data in memory (scatter loading)
  • Linker description file
  • Reset, start-up, start-up file

Efficient C programming for Cortex architectures

  • Compiler optimization, compiler options
  • Interface C - Assembler
  • Programming guidelines for ARM compilers
  • Optimized utilization of local and global data

Hardware-near C

  • C statements and their execution in Assembler
  • Access to peripherals in C
  • Layer model for embedded systems
  • Structured description of peripherals

Practical exercises with Keil µVision and ARM RealView Tools

  • Different tools can be used on request
  • All programs are tested on an evaluation board


The price includes lunch,

drinks, training documentation and certificate.


Information for HR

You can book up to 5 participants on one training with our online order form.
If you wish to book more participants on several trainings, please contact us!
Please also note our bonus program when booking several trainings and/or participants at once.


Information for HR

Related trainings

Cortex™-A5, A7, A8, A9, A15, A17: ARM Cortex-A Architecture Training
Training Code: E-CORTEXAX

Cortex™-M7, M4, M3, M1, M0: ARM Cortex-M Architecture Training
Training Code: E-CORTEXMX

STM32: Technical Training
Training Code: E-STM32

XMC4000 / XCM1000 Workshop: 32-Bit Industrial Microcontroller ARM® Cortex™-M4/ ARM® Cortex™-M0
Training Code: E-XMC4000

ARM7/ ARM9/ ARM10/ ARM11™: Architecture and Embedded Programming
Training Code: E-ARM-7/9

Embedded C Training: Programming Methods and Tools for Embedded Applications
Training Code: E-EMB-C

Embedded C++: Object-oriented Programming for Microcontrollers with C++/EC++ and UML
Training Code: E-EC++

Atmel Studio 6 & ASF: Application for Atmel ARM Core-based Flash Microcontrollers
Training Code: E-ATMEL-S


Related trainings

Trainings

DatePrice *Duration
05.03. – 08.03.20182.200,00 €4 days 
25.06. – 28.06.20182.200,00 €4 days 
12.11. – 15.11.20182.200,00 €4 days 
11.03. – 14.03.20192.200,00 €4 days 
Training code: E-CORTEXR4
* All prices are exclusive of applicable VAT.


> Registration form download (PDF)
> Training details as PDF

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Please contact us for further information or an individual quotation.

> Training details as PDF

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Cortex™-R4: ARM Cortex-R Architecture Training

Content

ARM Cortex Processor Architecture

  • Register organisation, operation modes, states, pipeline

ARM Processor Cores

  • Cortex™-R4 processor core
  • ARM7TDMI / ARM9TDMI / ARM9E-S / ARM10 / ARM11 processor core

ARM, Thumb, Thumb-2 Instruction Sets

  • ARM v4, v4T, v5, v6 instruction set
  • Thumb instruction set
  • Thumb-2 instruction set
  • ARM/Thumb interworking
  • Assembler directives

Exception Handling

  • FIQ, IRQ, abort, supervisor call, undefined
  • Exception handler examples
  • Vectored interrupt controller

Coprocessors, Floating Point Unit

  • ARM coprocessor concept
  • System controller CP15
  • Floating point unit, FPU
  • System configuration

L1 Memory Interface

  • Tightly coupled memory, cache architecture
  • Memory protection unit, MPU

L2 Memory Interface

  • AXI, advanced microprocessor bus architecture
  • Master interface
  • Slave interface

Debug, Trace, Performance Monitoring

  • Watchpoint units, embedded trace macrocell ETM
  • Performance monitor unit, PMU

Embedded Software Development

  • Adjustment of library routines to hardware (retargeting)
  • Placing code and data in memory (scatter loading)
  • Linker description file
  • Reset, start-up, start-up file

Efficient C programming for Cortex architectures

  • Compiler optimization, compiler options
  • Interface C - Assembler
  • Programming guidelines for ARM compilers
  • Optimized utilization of local and global data

Hardware-near C

  • C statements and their execution in Assembler
  • Access to peripherals in C
  • Layer model for embedded systems
  • Structured description of peripherals

Practical exercises with Keil µVision and ARM RealView Tools

  • Different tools can be used on request
  • All programs are tested on an evaluation board

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